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Espressif Systems /ESP32 /SENS /SAR_START_FORCE

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Interpret as SAR_START_FORCE

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0SAR1_BIT_WIDTH 0SAR2_BIT_WIDTH 0 (SAR2_EN_TEST)SAR2_EN_TEST 0SAR2_PWDET_CCT 0 (ULP_CP_FORCE_START_TOP)ULP_CP_FORCE_START_TOP 0 (ULP_CP_START_TOP)ULP_CP_START_TOP 0 (SARCLK_EN)SARCLK_EN 0PC_INIT0 (SAR2_STOP)SAR2_STOP 0 (SAR1_STOP)SAR1_STOP 0 (SAR2_PWDET_EN)SAR2_PWDET_EN

Fields

SAR1_BIT_WIDTH

00: 9 bit 01: 10 bits 10: 11bits 11: 12bits
SAR2_BIT_WIDTH

00: 9 bit 01: 10 bits 10: 11bits 11: 12bits
SAR2_EN_TEST

SAR2_EN_TEST only active when reg_sar2_dig_force = 0
SAR2_PWDET_CCT

SAR2_PWDET_CCT PA power detector capacitance tuning.
ULP_CP_FORCE_START_TOP

1: ULP-coprocessor is started by SW 0: ULP-coprocessor is started by timer
ULP_CP_START_TOP

Write 1 to start ULP-coprocessor only active when reg_ulp_cp_force_start_top = 1
SARCLK_EN
PC_INIT

initialized PC for ULP-coprocessor
SAR2_STOP

stop SAR ADC2 conversion
SAR1_STOP

stop SAR ADC1 conversion
SAR2_PWDET_EN

N/A

Links

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Register License

Copyright 2024 Espressif Systems (Shanghai) PTE LTD

Licensed under the Apache License, Version 2.0 (the “License”); you may not use this file except in compliance with the License. You may obtain a copy of the License at

http://www.apache.org/licenses/LICENSE-2.0

Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an “AS IS” BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and limitations under the License.

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data